The need often arises to measure the available processing capacity of a computer. Digital signal processors (e.g., microprocessors) have become commonplace in virtually every type of electronic equipment. Such processors can be used to perform a variety of functions. The flexibility provided by a processor is often advantageously used to augment the functions provided by a system, or to perform those functions using complex algorithms.
As a simple illustration, suppose one is designing a band pass filter for speech signals in a communications system. An analog bandpass filter constructed using operational amplifiers, resistors, and capacitors is one design option that is quite cost effective and provides suitable performance in many applications. To increase flexibility and performance, however, one might choose digital filtering techniques instead of analog techniques. In digital filtering, the filter characteristics are determined not by the values and configurations of amplifiers, resistors and capacitors, but by the program control steps performed by a digital signal processor (e.g., a microprocessor or some other device capable of processing digital signals). The filtering characteristics of a digital filter (e.g., frequency roll-off, "corner" frequencies, and the like) may be changed simply by modifying the programming executed by the processor--adding tremendous flexibility to the system.
There is typically a desire to take advantage of the capabilities of the processor to the fullest extent possible. The same processor used to perform the filtering can also be used to perform other related (and even unrelated) functions. For example, it may be desirable to use the processor to generate signaling tones for various applications, to provide system status information (e.g., to illuminate indicators or drive alphanumeric displays), to receive and process user commands, or the like. The processor can be used to perform far more complex filtering and other functions than could be performed cost effectively with analog circuitry.
Unfortunately, not all program code is as efficient as it could be, and even efficient code performing complex functions in real time can cause excessive processing loading. Processors have minimum "cycle times" (the time the processor requires to execute a single program control instruction). In the digital filtering example, the processor must process incoming signals in real time in addition to performing any "overhead" and other tasks. Processor "loading" (typically measured in percentage of maximum loading) depends upon the incoming data rate, the efficiency and complexity of the program control software, and the speed of the processor.
As a simple example, suppose the processor is capable of executing an instruction every microcsecond (10.sup.-6 seconds) and the incoming signal to be filtered is sampled once every millisecond (10.sup.-3 seconds). Suppose further that the filtering software performs an average of 500 instructions on each incoming sample--requiring a total time of 500.times.10.sup.-6 seconds =0.5 milliseconds of processing time for each sample. Processor loading would then be approximately 50% (or perhaps slightly above 50% due to additional overhead tasks the processor must perform). If the incoming signal sampling rate is increased to one sample every 0.5 milliseconds, the processor loading will increase to around 100%.
Excessive processor loading is potentially extremely detrimental. In the filtering example, excessive loading of the processor may cause data to be lost and/or introduce inaccuracies in the filtering process. If the processor is fully but not excessively loaded by its real time processing functions, it may have insufficient additional capacity to perform other functions it is called upon to perform. On the other hand, faster processors are typically much more expensive (and may not even be available in some applications), and in a cost effective design it is generally desirable to use components having capabilities on the same order as the demands placed upon them.
Unfortunately, it is not always possible to accurately predict how much loading a given processor will experience while performing given real time functions. Typical complex algorithms perform a variable number of instructions on input data depending upon factors which may be difficult or impossible to accurately take into account. Computer simulations are helpful, but since they can only simulate actual operating conditions they may be inaccurate. It is therefore preferable to actually measure processor loading under various different operating conditions.
Diagnostic programs which run concurrently with a processor's normal programming in order to measure processor loading are generally known. This type of diagnostic program may be called by an operating system program (if one is provided), or alternatively, may be interrupt driven and called periodically (e.g., whenever a timer times out). The diagnostic program may measure various parameters of processor loading (e.g., count processor cycles, and/or read the contents of processor work areas such as status register, stack contents, and the like) and, based on these (and other) parameters, calculate an indication of instantaneous or average loading. A history of such indications may be stored and analyzed to provide a measure of processor loading under various operating conditions.
Unfortunately, such diagnostic programs are generally complex and typically themselves add significantly to processor loading--causing the indications they provide to be inaccurate in some circumstances and adding to processor loading during measurements. A program which determines processor loading by counting processor cycles may underestimate the loading of a very busy processor because the processor may have insufficient resources to increment the cycle counter. A further shortcoming of such diagnostic programs is that they attempt to estimate how much of the time a processor is busy--whereas in most cases a more relevant inquiry is how much time the processor is not busy (and is therefore available to perform additional tasks).
It would be highly desirable to provide a cost effective arrangement which measures average processor loading and yet is non-invasive in that it is completely transparent to the operation of the processor (i.e., does not itself add to processor loading). Such an arrangement would be even more useful if it were capable of directly measuring the amount of available processing capacity under a variety of different operating conditions.
The present invention provides these and other advantageous features by including diagnostic instructions in the processor "idle loop."
A processor does not cease performing instructions when it is not busy, but instead jumps or "traps" to a so-called "idle loop" whenever it is idle. The idle loop generally consists of instructions which perform no useful function (e.g., "no operation," delay and/or jump instructions). When the processor must perform a function, it receives an "interrupt"--at which time it ceases performing instructions in the idle loop and begins performing other, useful program control instructions. The next time the processor has no further tasks to perform, it once again returns to its idle loop.
The present invention includes instructions in the processor idle loop which control the processor (or external circuitry associated with the processor) to measure the amount (or percentage) of time the processor operates in the idle loop. In the preferred embodiment, instructions in the processor idle loop control the processor to alternate a processor data output between output states. The processor data output alternates between states whenever the processor is idle, and remains in the same state when the processor is performing useful tasks. A frequency counter or other indicating device (e.g., a light emitting diode) responsive to the rate of processor data output state change may be used to directly indicate the amount of time the processor is idle relative to the total amount of processing time.
Since the change of state, not the state itself, of the data output is detected, it does not matter what state the data output is left in when the processor is interrupted from performing the idle loop instructions (by design, the priority associated with executing idle loop instructions is lower than the priority associated with executing any other instruction).
Because the processor performs the idle loop instructions only when it has nothing else to do, the additional idle loop instructions add nothing to processor loading and the load detecting arrangement accordingly is completely transparent to the operation of the processor. Moreover, the idle loop instructions directly measure the amount of time the processor spends in an idle state relative to the total amount of processing time--and therefore provide an extremely useful, direct indication of spare processing capacity. These advantages are all provided by an arrangement which adds only minimal cost to the processor system.